An edition of Switch-level timing simulation of MOS VLSI circuits
(1988)
Switch-level timing simulation of MOS VLSI circuits
by Vasant B. Rao, David V. Overhauser, Timothy N. Trick, and Ibrahim N. Hajj
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Previews available in: English
Subjects
Very large scale integration, Computer simulation, Integrated circuits, Circuits & components, Science/Mathematics, Very-Large-Scale Integration (Vlsi), Technology, Technology & Industrial Arts, Electronics - Circuits - General, Engineering - Electrical & Electronic, Technology / Electronics / Circuits / General, Technology-Engineering - Electrical & Electronic, Integrated circuits, very large scale integration| Edition | Availability |
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1
Switch-Level Timing Simulation of MOS VLSI Circuits
2012, Springer London, Limited
in English
1461317096 9781461317098
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2
Switch-Level Timing Simulation of Mos Vlsi Circuits
Oct 05, 2011, Springer
paperback
1461289637 9781461289630
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3
Switch-level timing simulation of MOS VLSI circuits
1989, Kluwer Academic Publishers
in English
0898383021 9780898383027
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4
Switch-Level Timing Simulation of MOS VLSI Circuits (The International Series in Engineering and Computer Science)
November 30, 1988, Springer
Hardcover
in English
- 1 edition
0898383021 9780898383027
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Book Details
Edition Notes
Bibliography: p. [193]-203.
Includes index.
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| July 31, 2020 | Edited by ImportBot | import existing book |
| July 31, 2019 | Edited by MARC Bot | associate edition with work OL19197638W |
| March 11, 2019 | Created by MARC Bot | import existing book |